Interconnect Extraction and Analysis;
Stress Check on Non-ESD Devices;
Electronics
Electronic Design Automation (EDA)
See
ESD Devices and Core Devices for HBM and CDM Events;
Current Density
Resistive 3D Extraction
Analysis and Dynamic Simulation of Large-Scale Power Devices;
Graphical Environment for Visualization and Debug;
Full-chip Point-to-Point Resistance Analysis;
Find and Fix Parasitic Problems Fast!
Accurate Rds(on) Modeling;
Hardware
Software
Distribution and Sensitivity Analyses;
Manufacturing
3D Electro-Thermal Simulation;
ESD Protection Network Verification;
Full-chip ESD Verification of Interconnect
Information Technology